Difference between revisions of "ZX81plus38 simple to build ZX-81 clone"

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(February 12, 2020)
(A new found error makes Revision 1,6 necessary)
 
(75 intermediate revisions by the same user not shown)
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{{Project
 
{{Project
 
  |Name=ZX81plus38
 
  |Name=ZX81plus38
  |Picture=ZX81+38 component overview proposal.png
+
  |Picture=ZX81+38rev1,5 top.png
  |Omschrijving=Most people I showed my ZX-81 clone (ZX81+35) said they liked it, but with such a tiny board and with so many "difficult" surface mount components, they doubted whether they would be able to build this kit, so I restarted my effort, to try to build a 100% ZX-81 clone that anybody could build, with commonly available pin-through-hole parts.  
+
  |Omschrijving=Most people I showed my ZX-81 clone (ZX81+35) said they liked it, but with such a tiny board and with so many "difficult" surface mount components, they doubted whether they would be able to build this kit, so I restarted my effort, to try to build a 100% compatible ZX-81 clone that anybody could build, with commonly available pin-through-hole parts.  
  |Status=Initializing
+
  |Status=In progress
 
  |Contact=mahjongg
 
  |Contact=mahjongg
 
}}
 
}}
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For now I will call it ZX81+38, but I doubt it will be finished in 2019, so it will probably be renamed to ZX81plus39... :-)
 
For now I will call it ZX81+38, but I doubt it will be finished in 2019, so it will probably be renamed to ZX81plus39... :-)
 +
 +
P.S. No I won't!
  
 
I started analyzing my current schematic, to see whether it contains components that are not available in PTH, and unfortunately there are some, for example "unbuffered inverters" (74HCU04) used in the crystal oscillator, are no longer available in DIP. Also some other logic isn't available in DIP, 13MHz crystals are hard to get in PTH versions, and 6.5MHz are not available at all.
 
I started analyzing my current schematic, to see whether it contains components that are not available in PTH, and unfortunately there are some, for example "unbuffered inverters" (74HCU04) used in the crystal oscillator, are no longer available in DIP. Also some other logic isn't available in DIP, 13MHz crystals are hard to get in PTH versions, and 6.5MHz are not available at all.
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== January 14, 2020, some progress ==
 
== January 14, 2020, some progress ==
 
The easy part is done, routing now becomes more difficult.
 
The easy part is done, routing now becomes more difficult.
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[[File:Ratsnest ZX81 plus 38 14 jan 2020.png|1000px]]
 
[[File:Ratsnest ZX81 plus 38 14 jan 2020.png|1000px]]
  
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[[File:Ratsnest ZX81+38 12 Feb 2020.png|1000px]]
 
[[File:Ratsnest ZX81+38 12 Feb 2020.png|1000px]]
  
Temporary removed a lot of connections to the expansion connector, as to improve the overview of the connections.
+
Removed a lot of connections to the expansion connector, as to improve the overview of the connections.
  
 
As for now, power and databus connections are present, as well as a few address lines. When the currently active connections are done, I will start adding address lines, and the most important control signals, then attempt to add the rest of the connections.
 
As for now, power and databus connections are present, as well as a few address lines. When the currently active connections are done, I will start adding address lines, and the most important control signals, then attempt to add the rest of the connections.
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== February 19, 2020 ==
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[[File:Finished layout ZX81+38 19 feb 2020 without copper fill.png|1000px]]
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Finished routing! Also Added enough connections to the expansion port so that I/O based expansions boards should still work (printer, Programmable sound generator board, joysticks etc). Memory expansion is not really useful, nor DMA. so it is not supported. in practice this should not be a problem.
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After I finish extensive cleanup I will add copper fill (GND).
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== February 26, 2020 ==
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I decided to do an ultimate attempt to route the missing signals to the expansion connector, so that I could also support external memory, and I succeeded in routing almost all connections, just two signals /BUSACK and /WAIT are not connected, but I'm planning to attempt these next week. :-)
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[[File:Ratsnest ZX81+38 26 Feb 2020.png |1000px]]
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== March 4, 2020 layout finished ==
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Finished /BUSACK and /WAIT, did DRC checks, added copper fills. created gerber files to do a productivity check.
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[[File:ZX81+38 4 maart 2020.png|1000px]]
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I uploaded the file to a PCB producer to check it for aberrations (violations of their production rules) and I'm happy to say there were none.
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This is how the top layer (without solder mask) would look like:
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[[File:ZX81plus38 copper top.PNG]]
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and this is the bottom layer:
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[[File:ZX81plus38 copper bottom.PNG]]
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I still have to work on the solder mask, (especially removing solder mask on the edge connector) and on the silk screen (paint)in the form of texts and logo's.
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Extra vias between top and bottom copperfill should be added wherever possible, and where possible ground traces should be added between two copperfills tightening the ground plane.
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== March 11, 2020 Added soldermask, and silkscreen ==
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I added a soldermask, which wasn't present last week. Made openings in soldermask for edge connector, and crystal. Added silk screen text, component values etc. Enhanced ground plane with via's, and fortified +5V traces with copper planes.
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This is how the PCB will look, top view:
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[[File:ZX81plus38 PCB rev 1,4 top view.PNG|1000px]]
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and bottom view
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[[File:ZX81plus38 PCB rev 1,4 bottom view.PNG|1000px]]
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== March 16, RefSpace is closed! ==
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Still to do (when Revspace opens again):
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clean up pre-wired jumpers, move all of them to the bottom (as they will be underneath components when they are on top). Add the default RAM size jumper for JP12 and set it to 16K (To GND, the most standard setting) 32K is nice but non standard. Also move bottom silk screen markers to correct positions.
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label all jumper positions as a table on the bottom silk screen (explain their functions).
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Also add rectangular boxes (silk screen) around jumpers.
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The jumpers are:
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JP1, select ROM size, default = 8K alternative = 16K
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JP4, place to select 50Hz, open = 60Hz
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JP5, Invert video, default = black text alternative = white text
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JP6, first pixel fill, default = white, alternative = black
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JP8, U5 pin 23, default = A11, alternative = A12
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JP9, U5 pin 26, default = A13, alternative = +5V
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JP10, U5 pin 20, default = nROMCS, alternative = A11
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JP12, U3 PIN 1, default= GND (16K), alternative A14 (32K)
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== April 10, ZX-81plus38 PCB is finished ==
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working from home, because of the corona crisis I finished the PCB layout. Made all pre-wired jumper connections accessible from the back side, and placed some descriptive text on the back about what these jumpers do. Also added a default wire for 16K/32K RAM with the default of 16K, for best compatibility with the original with a 16K memory pack.
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Don't forget to place the two jumpers for inverse video mode, and place default jumpers on them, in the position that pleases you, but don't forget that the real ZX-81 displayed black text on a white background. One jumper inverts the bits, another determines the "fill in color", with this setting wrong white or black stripes can appear between the letters.
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JP4 is normally left open, unless you are using an NTSC TV instead of the normal PAL TV.
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JP1 only has to change if you use a larger (than 8K) (E)PROM or OTP-ROM.
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When using a Atmel AT27C256R (32K) the code fits four times in the available size, I would recommend programming four identical 8K copies in the ROM.
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This is a picture of the final PCB:
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Top:
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[[File:Final ZX81plus38 PCB rev 1,4 top view.PNG|1000px]]
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and bottom:
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[[File:Final ZX81plus38 PCB rev 1,4 bottom view.PNG|1000px]]
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I also made a component overview drawing
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[[File:Final ZX81plus38 PCB rev 1,4 silk screen top.PNG|1000px]]
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I'm working on a bill of materials, and a final schematic (black and white .PDF)
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Currently I have uploaded a .ZIP with gerber and drill files to github, here:
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[https://github.com/mahjongg2/ZX81plus38/raw/master/ZX81%2B38%20rev%201%2C4%20gerber%20files.zip]
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my GitHub page is here: [https://github.com/mahjongg2]
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Its a bit hidden in the LICENSE.md directory, that will be corrected, and other stuff will be added, such as the BOM and KiCad files.
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by the way, the PCB is 142.2mm wide en 99.0mm high, you might need those dimensions when ordering a PCB.
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== Due to the COVID-19 crisis progress has temporarily halted ==
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RevSpace was/is in lockdown, and working on this project from home proved problematic, but slowly I will pick up the work again.
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next will be the Schematic in black and white, the BOM, and a keyboard layout specific for the ZX81plus38. Hopefully I didn't do the previous keyboard with the older windows CAD software, as if I did I have to do it over with KiCad.
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== I managed to work from home ==
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I finished the promised schematic in black and white, also found and corrected a few minor mistakes, 620 Ohm resistors do not exist in the E12 range and should be 680 Ohm, and RP2 was named incorrectly. this is the final schematic of 12 September 2020: [[File:ZX81plus38Rev1.4BW.pdf]]
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[[File:ZX81plus38Rev1,4BW.png]]
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I also finished the BOM of the ZX81+38, so now you can order the components. I used two sources for components, as neither of the to had all the components that are necessary. I used farnell and mouser as suppliers, and between them they had everything that is necessary to build this ZX-81 clone. This is the spreadsheet in open office (.ODS) format.
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[[File:ZX81plus38 BOM.ods]].
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I will try to upload these two files to github too.
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== Revision 1.5 with various corrections should now be working ==
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In this schematic all the reported faults and requested improvements are implemented.
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[[File:ZX81plus38rev1,5.pdf]]
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[[File:ZX81plus38rev1,5.png]]
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The following changes were made:
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# C1 and C2 of the crystal oscillator were lowered to 4.7pF
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# the signal n6.5M was removed, and flip/flop U18B was clocked with the non inverted clock 6.5M
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# the removed inverter U21D was used to build a new WAIT generator circuit in place of U18A, together with OR port U12B. the previous version did not work mainly because of the flip/flop not working as a WAIT generator. To be able to externally for the /WAIT signal low a resistor R20 was placed in series with the nWAIT output.
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# The RCA PSG01546 plug had a wrong footprint, and so could only be place 180 degrees rotated (not that it would work if you did). I found a replacement RCA plug that  could be inserted, the CLIFF FC68391, and updated the footprint for a perfect fit
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# on the expansion connector I had swapped A13 and A14, so I corrected it
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# also on the expansion connector JB1 pin 2 was tied to +5V, but this pin was meant for +9V, so I put a jumper between +5V and this pin, so the pin can be jumpered to +5V or tied to an external +9V source
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# The ROM socket was designed for an OTP (one time programmable, an EEPROM without its glass erase window) and with wire links on the bottom you could (re-jumper) by scratching a track and wiring between the other pads the socket for the original ZX-81 ROM.
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Some users asked if I could also support EEEPROMS, and although this was already possible pin 1 (A14 on an EEEPROM) was tied permanently high, so I made it that you could disconnect Pin 1, and tie it to something else, like a switch.
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# i had created the option to invert the video with two jumpers JP5 and JP6, but got the complaint that if you forgot to place these two jumpers you would get no video, so I also pre-connected these two jumpers for default white screen with black letters.
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Its still possible to get a black screen with white letters, but you have to scratch through the default pre-connects, and add a wire link
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# I got asked why the keyboard wires were not simply one strip of holes with a 2.54mm pitch,but was deliberate, the previous version has three extra holes for a power LED, and a reset button, ad I had removed these. So I added three holes, and put all holes in the same raster. Its possible to have a power LED on the keyboard now.
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# I enlarged the mounting hole bottom left, above the text "ZX81+38"two as requested.
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# Jumper JP1 was wired "in reverse", but as A13 was correctly connected to pin-1 of U23A that wasn't a problem
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If you have a revision 1.4 PCB, you can get it working by doing three things:
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# Use OTP's, not EEEPROMS (which are six times more expensive anyway) and fill the 32K rom with four copies of the ZX-81 BASIC.
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# Remove the output of the flip flop U28A, so that /WAIT is not driven,
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# and replace the WAIT circuit with either the two transistor improved wait circuit from wilf ritger, or the wait circuit of revision 1.5 with an inverter and OR port
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# disconnect U18B pin 11 (clk) from the inverted 6.5MHz clock, and tie it to the non inverted 6.5MHz clock, closest point to connect to is pin 2 of the shift register 74LS165 (U9).
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Now the clone should work.
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== Layout ZX81+38 rev 1,5 finished and checked ==
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This is the new layout of revision 1.5, it has been checked for DRC errors, and this is a screenshot of how the PCB will look like true size is 142mm wide and 100mm deep, so this picture is nearly true size (depending on your monitor): Top
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[[file:ZX81+38rev1,5 top.png]]
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and bottom:
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[[File:ZX81+38rev1,5 bottom.png]]
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== A new found error makes Revision 1,6 necessary ==
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We (the members of the microcontroller.net forum) have found another small error. The keyboard matrix uses address line A8 to A15, but A8 of this range of signals goes through a 1K resistor (signal is called A8' ) this is wrong! Just as A9 to A15 do not go through a 1K resistor so shouldn't A8 go through a resistor, as otherwise the data-line driven by A8 cannot pull the signal to nearly ground level.  So the layout must be changed so that A8' becomes just A8.
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Now started at this change which will become revision 1,6.
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this is the schematic, with a tiny change: [[File:ZX81plus38rev1,6.pdf]]
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The layout change was far more challenging, as I had to route a new signal (A8) throughout the PCB, from R1 to D6.
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Actually I was wrong, and the new routing wasn't actually needed, it was just that the pullups of 4K7 are just a bit too strong, and should have been 10K, with 4K7 the resistor divider created by the 1K address-series resistor, and 4K7 pullup made it that the logic level on the keyboard data line of a pressed key would not go low enough, and if you pressed a second key an illegal logic level could exist on A8' with 10K pullups this would be much less likely.
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Still, there is no reason to return to the old layout with A8' connected to D6, the original ZX-81 did that too (easier to layout I presume) so Ill keep this layout, only changed the schematics to a resistor array of 6 x 10K instead of 6 x 4K7.
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I kept the version number the same (rev 1,6)
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This is the new TOP side of rev 1,6
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[[File:PCB PrevIew ZX81+38 rev 1,6 top.png]]
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and this is the bottom side:
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File:PCB PrevIew ZX81+38 rev 1,6 bottom.png

Latest revision as of 14:58, 20 October 2020

Project ZX81plus38
ZX81+38rev1,5 top.png
Most people I showed my ZX-81 clone (ZX81+35) said they liked it, but with such a tiny board and with so many "difficult" surface mount components, they doubted whether they would be able to build this kit, so I restarted my effort, to try to build a 100% compatible ZX-81 clone that anybody could build, with commonly available pin-through-hole parts.
Status In progress
Contact mahjongg
Last Update 2020-10-20


September 18, 2019 I started the design

For now I will call it ZX81+38, but I doubt it will be finished in 2019, so it will probably be renamed to ZX81plus39... :-)

P.S. No I won't!

I started analyzing my current schematic, to see whether it contains components that are not available in PTH, and unfortunately there are some, for example "unbuffered inverters" (74HCU04) used in the crystal oscillator, are no longer available in DIP. Also some other logic isn't available in DIP, 13MHz crystals are hard to get in PTH versions, and 6.5MHz are not available at all. I decided to switch from 128K flash ROM to 32K OTP ROM's because the latter are available in DIP-28, while for the former I MUST use a PLC-32 socket. Eproms are a few dimes more expensive there days than OTP's, but DIP sockets are much cheaper than PLCC PTH sockets, and OTP and RAM in DIP-28 placed next to each other are much easier to layout. I also found cheap 32K x 8 static RAMs, also in DIP-28, which will be easier to layout for.

I will design it with KiCad unlike the older version which was designed using Ulticap and Ultiboard.

September 20, 2019 made a preliminary component placement of connectors and drill holes

Measured up a real ZX-81 PCB, and determined the size of its PCB, the locations of its mounting holes, and various connectors, I noticed that the Z80, and its ROM and RAM needed to be in a particular orientation, because of the mounting holes. determined the positions of the Video out connector (although the standard RCA output plug sits lower to the PCB than the RF-modulator output), and determined where the 3.5mm jacks for EAR and MIC should be located. For DC input I did not use another 3.5mm jack, nor did I choose a barrel jack, instead I used a model B (square) USB connector, so you can power the ZX81+38 with an USB charger and a type-A to Type-B (Device) USB cable.

I also placed the expansion port connector, which has the normal contact fingers, but can be enhanced with (gold plated) an angled dual row pinheader connector, so you can choose compatibility, or a more stable connection. I will route to the edge connector, and will place the edge connector "fingers" manually from there.

September 24, 2019 I placed most of the components in the schematic

I was curious if my USB replacement logic would fit, so I quickly placed most of the needed logic in the schematic, and annotated them the same as my SMT version (logic simplification and renumbering will come later), and gave them PTH footprints. At the end of the evening I had enough of the schematic elements to do a forward annotate, so I could do an estimate of it would fit, the result is visible in the top right hand corner of this page. To my relief I found that it should fit (its just a rough estimate obviously).

September 29, 2019 continued with component selection and routing of the schematic

I found out which combination of gates and such resulted in the fewest physical IC's, swapping some gates around, and trying to find replacements for single gate IC's, which do not exist in DIL. changed the AND that combined HSYNC and VSYNC to and EXOR as during VSYNC HSYNC pulses actually appear as inverted in the VSYNC signal, but perhaps I should check my logic here carefully.

I also changed the AND combining video with the nPORCH into a NOR, with inverted inputs, also something to check later.

I had forgotten how much trouble it is to get the connections of the Z80 databus to the NOP enforcer, and pullup resistor pack right, probably I will need lost more wire swapping action to get a somewhat easy to route solution.Laying out this board will be an interactive and iterative process, with lots of forward annotations, and corrections in how everything is connected. I won´t swap data and address lines around for the EPROM (or we have to do some swapping of the EPROM content too, and that is not what I want). This implies that RAM lines swapping won´t happen either, as the ROM and RAM wiring is almost identical.

October 1, 2019 continued

Stupidly I lost previously placed mounting holes, that took hard work to do , because I imported a schematic that didn't have them, so the forward annotate function removed them from the board. I noticed they were gone when I looked at the preview picture. So after uttering a few choice words I have now entered mounting holes in the schematic, and once again started with their placement. Luckily I had made a 1:1 (real size) printout of the PCB WITH the locations of the mounting holes, which makes measuring up their locations a tiny bit easier. Now I also differentiated between 3.0mm holes for the screws that close up the case, and slightly smaller (2.5mm) holes for mounting the PCB to the enclosure. I also re-read some old correspondence about using an EXOR for combining HSync and Vsync, and saw that there are technical reasons why using an simple OR function will be better, So I will do that instead. I also realized that from revision 2.2 to the current revision 4.0 of my ZX81+35 the sync generation logic has had a big overhaul, that has never been tested. Also I was warned that my component placement drawing of ZX91+35 contains an error, listing U13, as a 74HC32, (OR gates) instead of a 74HC00 (NAND gates). I wanted to check if the BOM had the same error and tried to download it from GitHub, but for some reason I only got a .ZIP containing gibberish instead of the spreadsheet. Both problems I will fix soon. Also the person who noticed the U13 problem also has problems with horizontal sync not being present, and I have to investigate that too. He promised to send me one of his two build up prototypes that have this problem. on a positive note, he is using my keyboard PCB too, and it is working fine!

October 6, schematic mostly finished

Yesterday I finished placing of the mounting holes in the PCB, today I mostly finished the schematic.

Replaced main picture with the preview schematic as a .PNG picture.

October 9, schematic rev1.0 finished

Schematic finished for rev 1.0, updated schematic File:ZX81plus38.pdf, plus preview schematic pictures. Next up, importing the components in the PCB layout, and placement of the parts. No attempts have been made yet to try to support multiple types of ROM/EPROM/FLASH, like the original ZX81 ROM. But this schematic should be complete. New is my attempt to support the canonical cassette loading video bars.

October 13, 2019, schematic rev1.1 (some errors fixed, added ZX81 ROM support)

Found, and repaired some errors, when doing electrical rule checking, (non connected power supply pins, no footprints assigned, such errors). nNMI is now directly connected to A6, without a resistor in-between. Improved the way cassette input shows up as loading bars by using and AND port. Noticed many labels where the "'" (bis) marker was changed to something very similar, but resulting in no connections between various connections having a "'" (bis) sign in the label, checked all nodes with a bis marker (D0' to D7' and A0' to A8') for connectivity, and repaired the labels with a problem. Also, I corrected some labels where I used the backslash to denote in inverted signal, instead of the lowercase "n" I used everywhere else.

also found a small error in the original ZX81 schematic, which claims that the D7 signal is NOT connected through a 470 Ohms resistor, but actually, it IS! (I measured 470 ohm between pin 13 of the Z80 and pin 1 of side A1 on a real ZX-81), so the "D7" label on the expansion connector should have been written as "D7'".

Added several 3-pin jumpers so that the EEPROM socket can be configured to accept a ROM from a real ZX81, These jumpers are pre-connected, and per default configured for a 27C256 EEPROM, two of the jumpers can also be used to select one of four possible 8K images that can be contained in a 27C256, per default only the first 8K is used. Jumpers will be "virtual", meaning they will probably be mounted on the underside of the PCB under the EEPROM, and to change for a ZX81 ROM you will need to scratch through the pre-connection between pin 1 and 2.

All components are now cleanly forward annotated, so next job will be component placement.

Schematic is now revision 1.1 File:ZX81plus38 rev 1.1.pdf

October 15, 2019, finished schematic rev1.2 (functionally complete)

Added support for loading bars, using spare gates, only new part is one pull-down resistor. added some explanatory texts, changed U22 so that its wiring is optimal for keyboard column readout placement. converted the logic type to active low logic symbols where that was more logical, so its easier to follow the logic.

This schematic should be functionally complete, (if nothing unexpected happens) changes beyond rev 1.2 should only consist of pin or component swapping optimizations, and component renumbering (after I did the placement).

Revision 1.2: File:ZX81plus38 rev1.2.pdf

October 20, 2016 rev 1.3 supports 16K ROM's

I realized that some people might want to extend the Sinclair BASIC ROM, or replace it with something else, and might need a larger ROM, so I added a (virtual) jumper to enable 16K ROM's to the ROM encoder and added A13 to the EEPROM address lines. revision 1.3 with 16K ROM support: File:ZX81plus38 rev1.3.pdf

October 30, 2016 First component placement

I managed to place all the components on the available IC's,but barely so.

px800

I will probably need to do a lot of optimization (IC and gate swapping) to minimize as much as possible the routing needed, as there is almost no space left for routing.

November 6, 2016 re-shaped the DIP pads to accommodate routing two wires between pads

As you can see in this picture, on various places it becomes impossible to do horizontal routing of connections, if you can only route one trace between two pads.

Ratsnest ZX81+38.png

You can also see I modified the PADs to make this possible, I decided to use a PAD height of 60 mil (with a hole size of 35mil, and a pad width of 90mil), so there is 40 mil between two pads, for two traces you need two traces of at least 0.15mm inter-spaced with three spaces of also at least 0.15mm. So 40 divided by 5 = 8mil, or 0.2032mm. I decided to use 0.2mm traces .

Next job is to simplify the rats nest by swapping ports (and or components).

November 13, 2019 Did a lot of placement optimization

Now the schematic is updated to revision 1.4. File:ZX81plus38rev 1.4.pdf due to swapped ports.

Not only a lot of ports have been swapped, but also the component placement itself has been modified a lot.

This is revision 1.4 as a 16 color .PNG (in full resolution), open to see full resolution.

ZX81plus38rev 1.4 16 colour.png

November 20, 2019 finished placement, did some power routing

based on schematic rev 1.4, I further optimized placement and started with power routing (GND and +5V) as the basis. This screenshot shows my progress:

Placement and ratnest 2019-11-20 02-05-42.png

December 10, 2019, partially routed

routing proceeds nicely, this is the current situation a few weeks later:

ZX81plus38 routing progress 10 december 2019.png

January 14, 2020, some progress

The easy part is done, routing now becomes more difficult.

Ratsnest ZX81 plus 38 14 jan 2020.png

January 22, 2020 more progress

Ratsnest ZX81plus38 22 jan 2020.png

January 28, 2020

Ratsnest ZX81+38 28 jan 2020.png

February 12, 2020

Ratsnest ZX81+38 12 Feb 2020.png

Removed a lot of connections to the expansion connector, as to improve the overview of the connections.

As for now, power and databus connections are present, as well as a few address lines. When the currently active connections are done, I will start adding address lines, and the most important control signals, then attempt to add the rest of the connections.

February 19, 2020

Finished layout ZX81+38 19 feb 2020 without copper fill.png

Finished routing! Also Added enough connections to the expansion port so that I/O based expansions boards should still work (printer, Programmable sound generator board, joysticks etc). Memory expansion is not really useful, nor DMA. so it is not supported. in practice this should not be a problem.

After I finish extensive cleanup I will add copper fill (GND).

February 26, 2020

I decided to do an ultimate attempt to route the missing signals to the expansion connector, so that I could also support external memory, and I succeeded in routing almost all connections, just two signals /BUSACK and /WAIT are not connected, but I'm planning to attempt these next week. :-)

Ratsnest ZX81+38 26 Feb 2020.png


March 4, 2020 layout finished

Finished /BUSACK and /WAIT, did DRC checks, added copper fills. created gerber files to do a productivity check.

ZX81+38 4 maart 2020.png

I uploaded the file to a PCB producer to check it for aberrations (violations of their production rules) and I'm happy to say there were none. This is how the top layer (without solder mask) would look like:

ZX81plus38 copper top.PNG

and this is the bottom layer:

ZX81plus38 copper bottom.PNG

I still have to work on the solder mask, (especially removing solder mask on the edge connector) and on the silk screen (paint)in the form of texts and logo's.

Extra vias between top and bottom copperfill should be added wherever possible, and where possible ground traces should be added between two copperfills tightening the ground plane.

March 11, 2020 Added soldermask, and silkscreen

I added a soldermask, which wasn't present last week. Made openings in soldermask for edge connector, and crystal. Added silk screen text, component values etc. Enhanced ground plane with via's, and fortified +5V traces with copper planes.

This is how the PCB will look, top view:

ZX81plus38 PCB rev 1,4 top view.PNG

and bottom view

ZX81plus38 PCB rev 1,4 bottom view.PNG

March 16, RefSpace is closed!

Still to do (when Revspace opens again): clean up pre-wired jumpers, move all of them to the bottom (as they will be underneath components when they are on top). Add the default RAM size jumper for JP12 and set it to 16K (To GND, the most standard setting) 32K is nice but non standard. Also move bottom silk screen markers to correct positions. label all jumper positions as a table on the bottom silk screen (explain their functions). Also add rectangular boxes (silk screen) around jumpers.

The jumpers are:

JP1, select ROM size, default = 8K alternative = 16K

JP4, place to select 50Hz, open = 60Hz

JP5, Invert video, default = black text alternative = white text

JP6, first pixel fill, default = white, alternative = black

JP8, U5 pin 23, default = A11, alternative = A12

JP9, U5 pin 26, default = A13, alternative = +5V

JP10, U5 pin 20, default = nROMCS, alternative = A11

JP12, U3 PIN 1, default= GND (16K), alternative A14 (32K)

April 10, ZX-81plus38 PCB is finished

working from home, because of the corona crisis I finished the PCB layout. Made all pre-wired jumper connections accessible from the back side, and placed some descriptive text on the back about what these jumpers do. Also added a default wire for 16K/32K RAM with the default of 16K, for best compatibility with the original with a 16K memory pack. Don't forget to place the two jumpers for inverse video mode, and place default jumpers on them, in the position that pleases you, but don't forget that the real ZX-81 displayed black text on a white background. One jumper inverts the bits, another determines the "fill in color", with this setting wrong white or black stripes can appear between the letters. JP4 is normally left open, unless you are using an NTSC TV instead of the normal PAL TV. JP1 only has to change if you use a larger (than 8K) (E)PROM or OTP-ROM. When using a Atmel AT27C256R (32K) the code fits four times in the available size, I would recommend programming four identical 8K copies in the ROM.

This is a picture of the final PCB: Top:

Final ZX81plus38 PCB rev 1,4 top view.PNG

and bottom:

Final ZX81plus38 PCB rev 1,4 bottom view.PNG

I also made a component overview drawing

Final ZX81plus38 PCB rev 1,4 silk screen top.PNG

I'm working on a bill of materials, and a final schematic (black and white .PDF) Currently I have uploaded a .ZIP with gerber and drill files to github, here: [1]

my GitHub page is here: [2]

Its a bit hidden in the LICENSE.md directory, that will be corrected, and other stuff will be added, such as the BOM and KiCad files.


by the way, the PCB is 142.2mm wide en 99.0mm high, you might need those dimensions when ordering a PCB.

Due to the COVID-19 crisis progress has temporarily halted

RevSpace was/is in lockdown, and working on this project from home proved problematic, but slowly I will pick up the work again. next will be the Schematic in black and white, the BOM, and a keyboard layout specific for the ZX81plus38. Hopefully I didn't do the previous keyboard with the older windows CAD software, as if I did I have to do it over with KiCad.

I managed to work from home

I finished the promised schematic in black and white, also found and corrected a few minor mistakes, 620 Ohm resistors do not exist in the E12 range and should be 680 Ohm, and RP2 was named incorrectly. this is the final schematic of 12 September 2020: File:ZX81plus38Rev1.4BW.pdf

ZX81plus38Rev1,4BW.png

I also finished the BOM of the ZX81+38, so now you can order the components. I used two sources for components, as neither of the to had all the components that are necessary. I used farnell and mouser as suppliers, and between them they had everything that is necessary to build this ZX-81 clone. This is the spreadsheet in open office (.ODS) format. File:ZX81plus38 BOM.ods.

I will try to upload these two files to github too.

Revision 1.5 with various corrections should now be working

In this schematic all the reported faults and requested improvements are implemented. File:ZX81plus38rev1,5.pdf

ZX81plus38rev1,5.png

The following changes were made:

  1. C1 and C2 of the crystal oscillator were lowered to 4.7pF
  2. the signal n6.5M was removed, and flip/flop U18B was clocked with the non inverted clock 6.5M
  3. the removed inverter U21D was used to build a new WAIT generator circuit in place of U18A, together with OR port U12B. the previous version did not work mainly because of the flip/flop not working as a WAIT generator. To be able to externally for the /WAIT signal low a resistor R20 was placed in series with the nWAIT output.
  4. The RCA PSG01546 plug had a wrong footprint, and so could only be place 180 degrees rotated (not that it would work if you did). I found a replacement RCA plug that could be inserted, the CLIFF FC68391, and updated the footprint for a perfect fit
  5. on the expansion connector I had swapped A13 and A14, so I corrected it
  6. also on the expansion connector JB1 pin 2 was tied to +5V, but this pin was meant for +9V, so I put a jumper between +5V and this pin, so the pin can be jumpered to +5V or tied to an external +9V source
  7. The ROM socket was designed for an OTP (one time programmable, an EEPROM without its glass erase window) and with wire links on the bottom you could (re-jumper) by scratching a track and wiring between the other pads the socket for the original ZX-81 ROM.

Some users asked if I could also support EEEPROMS, and although this was already possible pin 1 (A14 on an EEEPROM) was tied permanently high, so I made it that you could disconnect Pin 1, and tie it to something else, like a switch.

  1. i had created the option to invert the video with two jumpers JP5 and JP6, but got the complaint that if you forgot to place these two jumpers you would get no video, so I also pre-connected these two jumpers for default white screen with black letters.

Its still possible to get a black screen with white letters, but you have to scratch through the default pre-connects, and add a wire link

  1. I got asked why the keyboard wires were not simply one strip of holes with a 2.54mm pitch,but was deliberate, the previous version has three extra holes for a power LED, and a reset button, ad I had removed these. So I added three holes, and put all holes in the same raster. Its possible to have a power LED on the keyboard now.
  2. I enlarged the mounting hole bottom left, above the text "ZX81+38"two as requested.
  3. Jumper JP1 was wired "in reverse", but as A13 was correctly connected to pin-1 of U23A that wasn't a problem

If you have a revision 1.4 PCB, you can get it working by doing three things:

  1. Use OTP's, not EEEPROMS (which are six times more expensive anyway) and fill the 32K rom with four copies of the ZX-81 BASIC.
  2. Remove the output of the flip flop U28A, so that /WAIT is not driven,
  3. and replace the WAIT circuit with either the two transistor improved wait circuit from wilf ritger, or the wait circuit of revision 1.5 with an inverter and OR port
  4. disconnect U18B pin 11 (clk) from the inverted 6.5MHz clock, and tie it to the non inverted 6.5MHz clock, closest point to connect to is pin 2 of the shift register 74LS165 (U9).

Now the clone should work.

Layout ZX81+38 rev 1,5 finished and checked

This is the new layout of revision 1.5, it has been checked for DRC errors, and this is a screenshot of how the PCB will look like true size is 142mm wide and 100mm deep, so this picture is nearly true size (depending on your monitor): Top

ZX81+38rev1,5 top.png

and bottom:

ZX81+38rev1,5 bottom.png


A new found error makes Revision 1,6 necessary

We (the members of the microcontroller.net forum) have found another small error. The keyboard matrix uses address line A8 to A15, but A8 of this range of signals goes through a 1K resistor (signal is called A8' ) this is wrong! Just as A9 to A15 do not go through a 1K resistor so shouldn't A8 go through a resistor, as otherwise the data-line driven by A8 cannot pull the signal to nearly ground level. So the layout must be changed so that A8' becomes just A8.

Now started at this change which will become revision 1,6.

this is the schematic, with a tiny change: File:ZX81plus38rev1,6.pdf

The layout change was far more challenging, as I had to route a new signal (A8) throughout the PCB, from R1 to D6.

Actually I was wrong, and the new routing wasn't actually needed, it was just that the pullups of 4K7 are just a bit too strong, and should have been 10K, with 4K7 the resistor divider created by the 1K address-series resistor, and 4K7 pullup made it that the logic level on the keyboard data line of a pressed key would not go low enough, and if you pressed a second key an illegal logic level could exist on A8' with 10K pullups this would be much less likely. Still, there is no reason to return to the old layout with A8' connected to D6, the original ZX-81 did that too (easier to layout I presume) so Ill keep this layout, only changed the schematics to a resistor array of 6 x 10K instead of 6 x 4K7. I kept the version number the same (rev 1,6)

This is the new TOP side of rev 1,6 PCB PrevIew ZX81+38 rev 1,6 top.png

and this is the bottom side:

File:PCB PrevIew ZX81+38 rev 1,6 bottom.png