User:Ranzbak: Difference between revisions
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| = Ranzbak = | |||
| Nerd that does things with electronics and chemistry. | |||
| == Projects == | |||
| === FPGA Workshop === | |||
| {{Project | |||
|  |Name=FPGA workshop | |||
|  |Picture=nog nix | |||
|  |Omschrijving=A workshop to give people the basic knowledge needed to start developing FPGA projects. | |||
|  |Status=Initializing | |||
|  |Contact=Ranzbak | |||
| }} | |||
| I would like to have the first session of the workshop at Revspace, an Saturday 13th of April. | |||
| There will be space for at most 8 people. | |||
| Prerequisites: | |||
| * Installed Icestorm toolchain, that supports the Lattice ICE40UP5K FPGA. For instructions [http://www.clifford.at/icestorm/#install] | |||
| * A micro usb cable | |||
| * A working laptop that can run the Icestorm toolchain (Linux or OSX should be fine, for Windows I don't know) | |||
| * 4 hours of your time, an Saturday the 13th (There will be some breaks) | |||
| * Some basic knowledge about programming | |||
| Appreciated: | |||
| * Feedback | |||
| Provided: (Per person) | |||
| * A UPDuino V2 FPGA development board [[http://www.gnarlygrey.com/]] | |||
| * Breadboard to install the UPDuino on | |||
| * DS18B20 temperature sensor | |||
| * some dupont wire | |||
| * 2x 12k 1x4.7k resistor | |||
| Topics: (If I can fit them all in) | |||
| * Basic IO | |||
| * Modules | |||
| * Constraint files | |||
| * The clock | |||
| * Using simulation | |||
| * Module parameters | |||
| * Wires registers and variables | |||
| * Arrays | |||
| * Verilog tasks, functions, if statements, and for loops. | |||
| * Building a simple state machine using case statements | |||
| === Please install the toolchain before showing up === | |||
| Because the toolchain is pretty big the compiling takes a long time on my core I5 40 minutes, so having a working toolchain installed saves you a lot of frustratingly long waiting. | |||
| If the toolchain is already installed, and you would like to know if your toolchain will work with the development UPDuino V2, do the following: | |||
| <pre> | |||
| $ arachne-pnr -h | |||
| </pre> | |||
| This results in the help being printed, containing a list of the supported devices: | |||
| <pre> | |||
| <nowiki> | |||
|     -d <device>, --device <device> | |||
|         Target device <device>.  Supported devices: | |||
|           384 - Lattice Semiconductor iCE40LP384 | |||
|            1k - Lattice Semiconductor iCE40LP/HX1K | |||
|            5k - Lattice Semiconductor iCE40UP5K | |||
|          lm4k - Lattice Semiconductor iCE40LM4K | |||
|            8k - Lattice Semiconductor iCE40LP/HX8K | |||
|         Default: 1k | |||
| </nowiki> | |||
| </pre> | |||
| '''Notice''' the line '5k - Lattice Semiconductor iCE40UP5K', this tells you that the toolchain is good to go. | |||
| If not try to find a newer version and install it before the workshop. | |||
Revision as of 21:13, 29 March 2019
Ranzbak
Nerd that does things with electronics and chemistry.
Projects
FPGA Workshop
| Project FPGA workshop | |
|---|---|
| 350px | |
| A workshop to give people the basic knowledge needed to start developing FPGA projects. | |
| Status | Initializing | 
| Contact | Ranzbak | 
| Last Update | 2019-03-29 | 
I would like to have the first session of the workshop at Revspace, an Saturday 13th of April. There will be space for at most 8 people.
Prerequisites:
- Installed Icestorm toolchain, that supports the Lattice ICE40UP5K FPGA. For instructions [1]
- A micro usb cable
- A working laptop that can run the Icestorm toolchain (Linux or OSX should be fine, for Windows I don't know)
- 4 hours of your time, an Saturday the 13th (There will be some breaks)
- Some basic knowledge about programming
Appreciated:
- Feedback
Provided: (Per person)
- A UPDuino V2 FPGA development board [[2]]
- Breadboard to install the UPDuino on
- DS18B20 temperature sensor
- some dupont wire
- 2x 12k 1x4.7k resistor
Topics: (If I can fit them all in)
- Basic IO
- Modules
- Constraint files
- The clock
- Using simulation
- Module parameters
- Wires registers and variables
- Arrays
- Verilog tasks, functions, if statements, and for loops.
- Building a simple state machine using case statements
Please install the toolchain before showing up
Because the toolchain is pretty big the compiling takes a long time on my core I5 40 minutes, so having a working toolchain installed saves you a lot of frustratingly long waiting.
If the toolchain is already installed, and you would like to know if your toolchain will work with the development UPDuino V2, do the following:
$ arachne-pnr -h
This results in the help being printed, containing a list of the supported devices:
    -d <device>, --device <device>
        Target device <device>.  Supported devices:
          384 - Lattice Semiconductor iCE40LP384
           1k - Lattice Semiconductor iCE40LP/HX1K
           5k - Lattice Semiconductor iCE40UP5K
         lm4k - Lattice Semiconductor iCE40LM4K
           8k - Lattice Semiconductor iCE40LP/HX8K
        Default: 1k
Notice the line '5k - Lattice Semiconductor iCE40UP5K', this tells you that the toolchain is good to go. If not try to find a newer version and install it before the workshop.