head 1.2; access; symbols; locks; strict; comment @# @; expand @b@; 1.2 date 2011.05.01.14.25.07; author RoySmeding; state Exp; branches; next 1.1; 1.1 date 2011.05.01.14.12.20; author RoySmeding; state Exp; branches; next ; desc @none @ 1.2 log @save attachment @ text @v 20100214 2 C 16100 54300 1 0 0 switch-pushbutton-no-1.sym { T 15900 54600 5 10 1 1 0 0 1 refdes=S1 T 16500 54900 5 10 0 0 0 0 1 device=SWITCH_PUSHBUTTON_NO T 16100 54300 5 10 0 0 0 0 1 footprint=JUMPER2 T 16300 54600 5 10 1 1 0 0 1 description=start / reset } C 16100 53700 1 0 0 switch-pushbutton-no-1.sym { T 15900 53500 5 10 1 1 0 0 1 refdes=S2 T 16500 54300 5 10 0 0 0 0 1 device=SWITCH_PUSHBUTTON_NO T 16100 53700 5 10 0 0 0 0 1 footprint=JUMPER2 T 16300 53500 5 10 1 1 0 0 1 description=time / pause } C 24100 51800 1 0 0 74595-1.sym { T 24400 54640 5 10 0 0 0 0 1 device=74595 T 25800 54500 5 10 1 1 0 6 1 refdes=U4 T 24400 54850 5 10 0 0 0 0 1 footprint=DIP16 } C 24100 47800 1 0 0 74595-1.sym { T 24400 50640 5 10 0 0 0 0 1 device=74595 T 25800 50500 5 10 1 1 0 6 1 refdes=U5 T 24400 50850 5 10 0 0 0 0 1 footprint=DIP16 } C 24100 43800 1 0 0 74595-1.sym { T 24400 46640 5 10 0 0 0 0 1 device=74595 T 25800 46500 5 10 1 1 0 6 1 refdes=U6 T 24400 46850 5 10 0 0 0 0 1 footprint=DIP16 } C 24100 39800 1 0 0 74595-1.sym { T 24400 42640 5 10 0 0 0 0 1 device=74595 T 25800 42500 5 10 1 1 0 6 1 refdes=U7 T 24400 42850 5 10 0 0 0 0 1 footprint=DIP16 } C 26600 43400 1 0 0 ULN2801A-1.sym { T 28400 46500 5 10 1 1 0 0 1 refdes=U10 T 26900 47100 5 10 0 0 0 0 1 device=ULN2801A T 26600 43400 5 10 0 1 0 0 1 footprint=DIP18 } C 26600 51400 1 0 0 ULN2801A-1.sym { T 28400 54500 5 10 1 1 0 0 1 refdes=U8 T 26900 55100 5 10 0 0 0 0 1 device=ULN2801A T 26600 51400 5 10 0 0 0 0 1 footprint=DIP18 } C 26600 47400 1 0 0 ULN2801A-1.sym { T 28400 50500 5 10 1 1 0 0 1 refdes=U9 T 26900 51100 5 10 0 0 0 0 1 device=ULN2801A T 26600 47400 5 10 0 1 0 0 1 footprint=DIP18 } C 26600 39400 1 0 0 ULN2801A-1.sym { T 28400 42500 5 10 1 1 0 0 1 refdes=U11 T 26900 43100 5 10 0 0 0 0 1 device=ULN2801A T 26600 39400 5 10 0 1 0 0 1 footprint=DIP18 } N 26100 54100 26600 54100 4 N 26100 53800 26600 53800 4 N 26100 53500 26600 53500 4 N 26100 53200 26600 53200 4 N 26100 52000 26600 52000 4 N 26100 52300 26600 52300 4 N 26100 52600 26600 52600 4 N 26100 52900 26600 52900 4 N 26600 50100 26100 50100 4 N 26600 49800 26100 49800 4 N 26600 49500 26100 49500 4 N 26600 49200 26100 49200 4 N 26600 48900 26100 48900 4 N 26600 48600 26100 48600 4 N 26600 48300 26100 48300 4 N 26600 48000 26100 48000 4 N 26100 46100 26600 46100 4 N 26100 45800 26600 45800 4 N 26100 45500 26600 45500 4 N 26100 45200 26600 45200 4 N 26100 44000 26600 44000 4 N 26100 44300 26600 44300 4 N 26100 44600 26600 44600 4 N 26100 44900 26600 44900 4 N 26100 42100 26600 42100 4 N 26100 41800 26600 41800 4 N 26100 41500 26600 41500 4 N 26100 41200 26600 41200 4 N 26100 40000 26600 40000 4 N 26100 40300 26600 40300 4 N 26100 40600 26600 40600 4 N 26100 40900 26600 40900 4 N 24100 44900 23800 44900 4 N 23800 44900 23800 48000 4 N 23800 48000 24100 48000 4 N 24100 52000 23800 52000 4 N 23800 52000 23800 48900 4 N 23800 48900 24100 48900 4 N 24100 44000 23800 44000 4 N 23800 40900 23800 44000 4 N 23800 40900 24100 40900 4 N 23100 53800 24100 53800 4 N 23500 41800 23500 53800 4 N 23500 49800 24100 49800 4 N 23500 45800 24100 45800 4 N 23500 41800 24100 41800 4 N 24100 41200 23100 41200 4 N 23100 41200 23100 53400 4 N 23100 45200 24100 45200 4 N 23100 49200 24100 49200 4 N 22800 52900 24100 52900 4 N 24100 41500 24000 41500 4 N 24000 41500 24000 54100 4 N 24000 54100 24100 54100 4 N 24000 53500 24100 53500 4 N 24000 53500 24000 50100 4 N 24000 50100 24100 50100 4 N 24000 49500 24100 49500 4 N 24100 46100 24000 46100 4 N 24100 45500 24000 45500 4 N 24100 42100 24000 42100 4 N 17100 54300 18700 54300 4 N 15900 49900 15900 54300 4 N 15900 54300 16100 54300 4 N 15900 53700 16100 53700 4 C 18500 49200 1 0 0 ATmega328-AU_np.sym { T 19000 55500 5 10 0 0 0 0 1 device=MICRO T 19000 54600 5 10 1 1 0 0 1 value=ATmega328-AU T 19000 55100 5 10 0 0 0 0 1 footprint=DIP28N T 19000 54800 5 10 1 1 0 0 1 refdes=U1 } C 17200 51000 1 270 0 resonator-1.sym { T 17400 50900 5 10 1 1 0 2 1 refdes=X1 T 17950 50700 5 10 0 0 270 0 1 device=resonator T 18150 50700 5 10 0 0 270 0 1 footprint=res T 17200 50100 5 10 1 1 0 0 1 value=8MHz } C 29200 55800 1 0 0 12V-plus-1.sym C 16100 49900 1 180 0 vss-1.sym C 19900 55200 1 0 0 5V-plus-1.sym C 20300 48700 1 180 0 vss-1.sym N 29400 55400 28100 55400 4 N 28100 55400 28100 54700 4 N 29400 51400 28100 51400 4 N 28100 51400 28100 50700 4 N 29400 47400 28100 47400 4 N 28100 47400 28100 46700 4 N 28100 42700 28100 43400 4 N 28100 43400 29700 43400 4 N 29400 55800 29400 43400 4 C 29800 38700 1 180 0 vss-1.sym N 27800 39400 27800 39200 4 N 27800 39200 29600 39200 4 N 29600 38700 29600 51200 4 N 29600 43000 27800 43000 4 N 27800 43000 27800 43400 4 N 27800 47400 27800 47000 4 N 27800 47000 29600 47000 4 N 29600 51200 27800 51200 4 N 27800 51200 27800 51400 4 U 33600 53900 33600 40200 10 -1 U 33600 40200 36600 40200 10 0 U 36600 40200 36600 49400 10 0 N 29000 54100 33400 54100 4 { T 32900 54100 5 10 1 1 0 0 1 netname=d0sG } N 29000 53800 33400 53800 4 { T 32900 53800 5 10 1 1 0 0 1 netname=d0sF } N 29000 53500 33400 53500 4 { T 32900 53500 5 10 1 1 0 0 1 netname=d0sE } N 29000 53200 33400 53200 4 { T 32900 53200 5 10 1 1 0 0 1 netname=d0sD } N 29000 52900 33400 52900 4 { T 32900 52900 5 10 1 1 0 0 1 netname=d0sC } N 29000 52600 33400 52600 4 { T 32900 52600 5 10 1 1 0 0 1 netname=d0sB } N 29000 52300 33400 52300 4 { T 32900 52300 5 10 1 1 0 0 1 netname=d0sA } N 29000 52000 33400 52000 4 { T 32900 52000 5 10 1 1 0 0 1 netname=dotL } N 29000 50100 33400 50100 4 { T 32900 50100 5 10 1 1 0 0 1 netname=d1sG } N 29000 49800 33400 49800 4 { T 32900 49800 5 10 1 1 0 0 1 netname=d1sF } N 29000 49200 33400 49200 4 { T 32900 49200 5 10 1 1 0 0 1 netname=d1sAD } N 29000 49500 33400 49500 4 { T 32900 49500 5 10 1 1 0 0 1 netname=d1sE } N 29000 48900 33400 48900 4 { T 32900 48900 5 10 1 1 0 0 1 netname=d1sC } N 29000 48600 33400 48600 4 { T 32900 48600 5 10 1 1 0 0 1 netname=d1sB } N 29000 48300 33400 48300 4 { T 32900 48300 5 10 1 1 0 0 1 netname=grid0 } N 29000 48000 33400 48000 4 { T 32900 48000 5 10 1 1 0 0 1 netname=grid1 } N 29000 46100 33400 46100 4 { T 32900 46100 5 10 1 1 0 0 1 netname=d2sG } N 29000 45800 33400 45800 4 { T 32900 45800 5 10 1 1 0 0 1 netname=d2sF } N 29000 45500 33400 45500 4 { T 32900 45500 5 10 1 1 0 0 1 netname=d2sE } N 29000 45200 33400 45200 4 { T 32900 45200 5 10 1 1 0 0 1 netname=d2sD } N 29000 44900 33400 44900 4 { T 32900 44900 5 10 1 1 0 0 1 netname=d2sC } N 29000 44600 33400 44600 4 { T 32900 44600 5 10 1 1 0 0 1 netname=d2sB } N 29000 44300 33400 44300 4 { T 32900 44300 5 10 1 1 0 0 1 netname=d2sA } N 29000 44000 33400 44000 4 { T 32900 44000 5 10 1 1 0 0 1 netname=dotU } N 29000 42100 33400 42100 4 { T 32900 42100 5 10 1 1 0 0 1 netname=d3sG } N 29000 41800 33400 41800 4 { T 32900 41800 5 10 1 1 0 0 1 netname=d3sF } N 29000 40600 33400 40600 4 { T 32900 40600 5 10 1 1 0 0 1 netname=d3sB } N 29000 40900 33400 40900 4 { T 32900 40900 5 10 1 1 0 0 1 netname=d3sC } N 29000 41200 33400 41200 4 { T 32900 41200 5 10 1 1 0 0 1 netname=d3sAD } N 29000 41500 33400 41500 4 { T 32900 41500 5 10 1 1 0 0 1 netname=d3sE } N 29000 40300 33400 40300 4 { T 32900 40300 5 10 1 1 0 0 1 netname=grid2 } N 33400 40000 29000 40000 4 { T 32900 40000 5 10 1 1 0 0 1 netname=grid3 } C 36100 42500 1 0 0 generic-power.sym { T 36300 42750 5 10 1 1 0 3 1 netname=Vfil } C 34400 41600 1 180 0 vss-1.sym N 34200 41600 34200 43600 4 T 23300 40700 15 10 1 0 0 0 1 Air hockey score board T 23300 40400 15 10 1 0 0 0 1 scoreboard.sch T 23700 40100 15 10 1 0 0 0 1 1 T 25200 40100 15 10 1 0 0 0 1 1 T 27800 40400 15 10 1 0 0 0 1 1 T 27200 40100 15 10 1 0 0 0 1 Roy Smeding C 33400 54100 1 180 1 busripper-1.sym { T 33400 53700 5 8 0 0 180 6 1 device=none } C 33400 53800 1 180 1 busripper-1.sym { T 33400 53400 5 8 0 0 180 6 1 device=none } C 33400 53500 1 180 1 busripper-1.sym { T 33400 53100 5 8 0 0 180 6 1 device=none } C 33400 53200 1 180 1 busripper-1.sym { T 33400 52800 5 8 0 0 180 6 1 device=none } C 33400 52900 1 180 1 busripper-1.sym { T 33400 52500 5 8 0 0 180 6 1 device=none } C 33400 52600 1 180 1 busripper-1.sym { T 33400 52200 5 8 0 0 180 6 1 device=none } C 33400 52300 1 180 1 busripper-1.sym { T 33400 51900 5 8 0 0 180 6 1 device=none } C 33400 52000 1 180 1 busripper-1.sym { T 33400 51600 5 8 0 0 180 6 1 device=none } C 33400 50100 1 180 1 busripper-1.sym { T 33400 49700 5 8 0 0 180 6 1 device=none } C 33400 49800 1 180 1 busripper-1.sym { T 33400 49400 5 8 0 0 180 6 1 device=none } C 33400 49500 1 180 1 busripper-1.sym { T 33400 49100 5 8 0 0 180 6 1 device=none } C 33400 49200 1 180 1 busripper-1.sym { T 33400 48800 5 8 0 0 180 6 1 device=none } C 33400 48900 1 180 1 busripper-1.sym { T 33400 48500 5 8 0 0 180 6 1 device=none } C 33400 48600 1 180 1 busripper-1.sym { T 33400 48200 5 8 0 0 180 6 1 device=none } C 33400 48300 1 180 1 busripper-1.sym { T 33400 47900 5 8 0 0 180 6 1 device=none } C 33400 48000 1 180 1 busripper-1.sym { T 33400 47600 5 8 0 0 180 6 1 device=none } C 33400 44000 1 0 0 busripper-1.sym { T 33400 44400 5 8 0 0 0 0 1 device=none } C 33400 44300 1 0 0 busripper-1.sym { T 33400 44700 5 8 0 0 0 0 1 device=none } C 33400 44600 1 0 0 busripper-1.sym { T 33400 45000 5 8 0 0 0 0 1 device=none } C 33400 44900 1 0 0 busripper-1.sym { T 33400 45300 5 8 0 0 0 0 1 device=none } C 33400 45200 1 0 0 busripper-1.sym { T 33400 45600 5 8 0 0 0 0 1 device=none } C 33400 45500 1 0 0 busripper-1.sym { T 33400 45900 5 8 0 0 0 0 1 device=none } C 33400 45800 1 0 0 busripper-1.sym { T 33400 46200 5 8 0 0 0 0 1 device=none } C 33400 46100 1 0 0 busripper-1.sym { T 33400 46500 5 8 0 0 0 0 1 device=none } C 33400 40000 1 0 0 busripper-1.sym { T 33400 40400 5 8 0 0 0 0 1 device=none } C 33400 40300 1 0 0 busripper-1.sym { T 33400 40700 5 8 0 0 0 0 1 device=none } C 33400 40600 1 0 0 busripper-1.sym { T 33400 41000 5 8 0 0 0 0 1 device=none } C 33400 40900 1 0 0 busripper-1.sym { T 33400 41300 5 8 0 0 0 0 1 device=none } C 33400 41200 1 0 0 busripper-1.sym { T 33400 41600 5 8 0 0 0 0 1 device=none } C 33400 41500 1 0 0 busripper-1.sym { T 33400 41900 5 8 0 0 0 0 1 device=none } C 33400 41800 1 0 0 busripper-1.sym { T 33400 42200 5 8 0 0 0 0 1 device=none } C 33400 42100 1 0 0 busripper-1.sym { T 33400 42500 5 8 0 0 0 0 1 device=none } N 23100 53400 21600 53400 4 N 24100 53200 23100 53200 4 N 22800 52900 22800 53200 4 N 22800 53200 21600 53200 4 N 23100 53800 23100 53600 4 N 23100 53600 21600 53600 4 N 20100 55200 20100 54800 4 N 20600 54800 20600 55000 4 N 20600 55000 20100 55000 4 N 20100 49200 20100 48700 4 N 20600 49200 20600 48900 4 N 20600 48900 20100 48900 4 N 17100 53700 17200 53700 4 N 17200 53700 17200 54100 4 N 17200 54100 18700 54100 4 N 17200 50500 15900 50500 4 N 17700 51000 17700 51100 4 N 17700 51100 18200 51100 4 N 18200 51100 18200 50600 4 N 18200 50600 18700 50600 4 N 18700 50400 18200 50400 4 N 18200 50400 18200 49900 4 N 18200 49900 17700 49900 4 N 17700 50000 17700 49900 4 C 16000 44600 1 180 0 vss-1.sym N 15400 44800 16200 44800 4 N 17700 53700 18700 53700 4 N 18700 53900 17500 53900 4 C 15600 45000 1 90 0 LED.sym { T 13400 45100 5 10 0 0 90 0 1 symversion=20090304 T 13600 45100 5 10 0 0 90 0 1 device=LED T 14000 45100 5 10 0 0 90 0 1 symversion=20090304 T 15350 45250 5 10 1 1 180 0 1 refdes=D1 T 15600 45000 5 10 0 1 0 0 1 footprint=JUMPER2 } C 16400 45000 1 90 0 LED.sym { T 14200 45100 5 10 0 0 90 0 1 symversion=20090304 T 14400 45100 5 10 0 0 90 0 1 device=LED T 14800 45100 5 10 0 0 90 0 1 symversion=20090304 T 16550 45250 5 10 1 1 180 0 1 refdes=D3 T 16400 45000 5 10 0 1 0 0 1 footprint=JUMPER2 } C 15500 46400 1 90 0 resistor-2.sym { T 15150 46800 5 10 0 0 90 0 1 device=RESISTOR T 15200 46600 5 10 1 1 90 0 1 refdes=R2 T 15500 46400 5 10 0 1 0 0 1 footprint=ACY300 } C 16300 46400 1 90 0 resistor-2.sym { T 15950 46800 5 10 0 0 90 0 1 device=RESISTOR T 16000 46600 5 10 1 1 90 0 1 refdes=R4 T 16300 46400 5 10 0 1 0 0 1 footprint=ACY300 } N 16200 47800 16200 47300 4 N 15400 47300 15400 47800 4 N 15400 46400 15400 45900 4 N 16200 46400 16200 45900 4 N 16200 45000 16200 44800 4 N 15400 45000 15400 44800 4 C 16500 52900 1 90 0 photo-transistor-1.sym { T 16000 52700 5 6 0 1 90 0 1 device=PS2501-1 T 16740 53000 5 10 1 1 180 0 1 refdes=Q1 T 16500 52860 5 10 0 1 90 0 1 device=photo-transistor T 16500 52900 5 10 0 1 90 0 1 footprint=JUMPER2 T 17100 52800 5 10 1 1 180 0 1 description=P1 goal } C 16500 52300 1 90 0 photo-transistor-1.sym { T 16000 52100 5 6 0 1 90 0 1 device=PS2501-1 T 16740 52400 5 10 1 1 180 0 1 refdes=Q2 T 16500 52260 5 10 0 1 90 0 1 device=photo-transistor T 16500 52300 5 10 0 1 90 0 1 footprint=JUMPER2 T 17100 52200 5 10 1 1 180 0 1 description=P2 goal } N 16200 47800 15400 47800 4 N 15800 44600 15800 44800 4 C 15600 47800 1 0 0 5V-plus-1.sym C 16900 40000 1 270 0 capacitor-4.sym { T 18000 39800 5 10 0 0 270 0 1 device=POLARIZED_CAPACITOR T 17400 39500 5 10 1 1 0 0 1 refdes=C1 T 17600 39800 5 10 0 0 270 0 1 symversion=0.1 T 16900 40000 5 10 0 0 0 0 1 footprint=RCY200 } C 15800 41100 1 0 0 diode-1.sym { T 16200 41700 5 10 0 0 0 0 1 device=DIODE T 16100 41600 5 10 1 1 0 0 1 refdes=D2 T 16000 40900 5 10 1 1 0 0 1 device=1N1004 T 15800 41100 5 10 0 0 0 0 1 footprint=ALF300 } N 15400 41300 15800 41300 4 N 16700 41300 17500 41300 4 C 15400 40500 1 0 1 connector2-2.sym { T 14700 41800 5 10 1 1 0 0 1 refdes=J1 T 15100 41750 5 10 0 0 0 6 1 device=CONNECTOR_2 T 15100 41950 5 10 0 0 0 6 1 footprint=JUMPER2 T 14700 40300 5 10 1 1 0 0 1 description=power } C 17500 40700 1 0 0 vreg.sym { T 19100 42000 5 10 0 0 0 0 1 device=regulator T 18000 41700 5 10 1 1 0 6 1 refdes=U2 T 18500 41700 5 10 1 1 0 0 1 description=+5V T 17500 40700 5 10 0 0 0 0 1 footprint=TO220W } C 18400 39700 1 0 0 vreg.sym { T 20000 41000 5 10 0 0 0 0 1 device=regulator T 18900 40700 5 10 1 1 0 6 1 refdes=U3 T 19300 40700 5 10 1 1 0 0 1 description=+3.3V T 18400 39700 5 10 0 0 0 0 1 footprint=TO220W } C 19400 42200 1 0 0 5V-plus-1.sym C 16900 42200 1 0 0 12V-plus-1.sym C 20000 42200 1 0 0 generic-power.sym { T 20200 42450 5 10 1 1 0 3 1 netname=Vfil } N 18300 40700 18300 38900 4 N 15600 38900 20800 38900 4 N 19200 38900 19200 39700 4 N 15600 38900 15600 40900 4 N 15600 40900 15400 40900 4 N 17100 39100 17100 38900 4 C 18500 38700 1 180 0 vss-1.sym N 18300 38900 18300 38700 4 N 17100 41300 17100 40000 4 N 17100 40300 18400 40300 4 N 20000 40300 20200 40300 4 N 20200 40000 20200 42200 4 N 19600 42200 19600 41300 4 N 19100 41300 20800 41300 4 N 17100 41300 17100 42200 4 C 32400 54300 1 0 1 resistorpack9-1.sym { T 32300 55700 5 10 0 0 0 6 1 device=RESISTORPACK_9 T 30400 55500 5 10 1 1 0 6 1 refdes=R5 T 32400 54300 5 10 0 1 0 0 1 footprint=SIP9 T 31900 55500 5 10 1 1 0 0 1 value=3.3k } N 29700 55400 29400 55400 4 N 30200 54300 30200 54100 4 N 30500 54300 30500 53800 4 N 30800 54300 30800 53500 4 N 31100 54300 31100 53200 4 N 31400 54300 31400 52900 4 N 31700 54300 31700 52600 4 N 32000 54300 32000 52300 4 N 32300 54300 32300 52000 4 C 32400 50300 1 0 1 resistorpack9-1.sym { T 32300 51700 5 10 0 0 0 6 1 device=RESISTORPACK_9 T 30400 51500 5 10 1 1 0 6 1 refdes=R6 T 32400 50300 5 10 0 1 0 0 1 footprint=SIP9 T 31900 51500 5 10 1 1 0 0 1 value=3.3k } N 30200 50300 30200 50100 4 N 30500 50300 30500 49800 4 N 30800 50300 30800 49500 4 N 31100 50300 31100 49200 4 N 31400 50300 31400 48900 4 N 31700 50300 31700 48600 4 N 32000 50300 32000 48300 4 N 32300 50300 32300 48000 4 C 32400 46300 1 0 1 resistorpack9-1.sym { T 32300 47700 5 10 0 0 0 6 1 device=RESISTORPACK_9 T 30400 47500 5 10 1 1 0 6 1 refdes=R7 T 32400 46300 5 10 0 1 0 0 1 footprint=SIP9 T 31900 47500 5 10 1 1 0 0 1 value=3.3k } N 30200 46300 30200 46100 4 N 30500 46300 30500 45800 4 N 30800 46300 30800 45500 4 N 31100 46300 31100 45200 4 N 31400 46300 31400 44900 4 N 31700 46300 31700 44600 4 N 32000 46300 32000 44300 4 N 32300 46300 32300 44000 4 C 32400 42300 1 0 1 resistorpack9-1.sym { T 32300 43700 5 10 0 0 0 6 1 device=RESISTORPACK_9 T 30400 43500 5 10 1 1 0 6 1 refdes=R8 T 32400 42300 5 10 0 1 0 0 1 footprint=SIP9 T 31900 43500 5 10 1 1 0 0 1 value=3.3k } N 30200 42300 30200 42100 4 N 30500 42300 30500 41800 4 N 30800 42300 30800 41500 4 N 31100 42300 31100 41200 4 N 31400 42300 31400 40900 4 N 31700 42300 31700 40600 4 N 32000 42300 32000 40300 4 N 32300 42300 32300 40000 4 N 29400 47400 29700 47400 4 N 29700 51400 29400 51400 4 C 34400 41800 1 0 0 header40-2.sym { T 34650 50300 5 10 0 1 0 0 1 device=HEADER40 T 35000 49900 5 10 1 1 0 0 1 refdes=J3 T 34400 41800 5 10 0 0 0 0 1 footprint=HEADER40_2 T 34700 41600 5 10 1 1 0 0 1 description=to VFDs } C 33800 47200 1 180 0 busripper-1.sym { T 33800 46800 5 8 0 0 180 0 1 device=none } C 33800 47600 1 180 0 busripper-1.sym { T 33800 47200 5 8 0 0 180 0 1 device=none } C 33800 48000 1 180 0 busripper-1.sym { T 33800 47600 5 8 0 0 180 0 1 device=none } C 33800 48400 1 180 0 busripper-1.sym { T 33800 48000 5 8 0 0 180 0 1 device=none } C 33800 48800 1 180 0 busripper-1.sym { T 33800 48400 5 8 0 0 180 0 1 device=none } C 33800 49200 1 180 0 busripper-1.sym { T 33800 48800 5 8 0 0 180 0 1 device=none } C 33800 49600 1 180 0 busripper-1.sym { T 33800 49200 5 8 0 0 180 0 1 device=none } C 33800 44400 1 180 0 busripper-1.sym { T 33800 44000 5 8 0 0 180 0 1 device=none } N 34400 47200 33800 47200 4 { T 34300 47200 5 10 1 1 0 6 1 netname=d0sG } N 34400 47600 33800 47600 4 { T 34300 47600 5 10 1 1 0 6 1 netname=d0sF } N 34400 48000 33800 48000 4 { T 34300 48000 5 10 1 1 0 6 1 netname=d0sE } N 34400 48400 33800 48400 4 { T 34300 48400 5 10 1 1 0 6 1 netname=d0sD } N 34400 48800 33800 48800 4 { T 34300 48800 5 10 1 1 0 6 1 netname=d0sC } N 34400 49200 33800 49200 4 { T 34300 49200 5 10 1 1 0 6 1 netname=d0sB } N 34400 49600 33800 49600 4 { T 34300 49600 5 10 1 1 0 6 1 netname=d0sA } N 34400 44400 33800 44400 4 { T 34300 44400 5 10 1 1 0 6 1 netname=dotL } N 34400 44800 33800 44800 4 { T 34300 44800 5 10 1 1 0 6 1 netname=d1sG } N 34400 45200 33800 45200 4 { T 34300 45200 5 10 1 1 0 6 1 netname=d1sF } N 34400 46000 33800 46000 4 { T 34400 46000 5 10 1 1 0 6 1 netname=d1sAD } N 34400 45600 33800 45600 4 { T 34300 45600 5 10 1 1 0 6 1 netname=d1sE } N 34400 46400 33800 46400 4 { T 34300 46400 5 10 1 1 0 6 1 netname=d1sC } N 34400 46800 33800 46800 4 { T 34300 46800 5 10 1 1 0 6 1 netname=d1sB } N 35800 44400 36400 44400 4 { T 35900 44400 5 10 1 1 0 0 1 netname=grid0 } N 35800 44000 36400 44000 4 { T 35900 44000 5 10 1 1 0 0 1 netname=grid1 } C 33800 44800 1 180 0 busripper-1.sym { T 33800 44400 5 8 0 0 180 0 1 device=none } C 33800 45200 1 180 0 busripper-1.sym { T 33800 44800 5 8 0 0 180 0 1 device=none } C 33800 45600 1 180 0 busripper-1.sym { T 33800 45200 5 8 0 0 180 0 1 device=none } C 33800 46000 1 180 0 busripper-1.sym { T 33800 45600 5 8 0 0 180 0 1 device=none } C 33800 46400 1 180 0 busripper-1.sym { T 33800 46000 5 8 0 0 180 0 1 device=none } C 33800 46800 1 180 0 busripper-1.sym { T 33800 46400 5 8 0 0 180 0 1 device=none } C 36400 44400 1 180 1 busripper-1.sym { T 36400 44000 5 8 0 0 180 6 1 device=none } C 36400 44000 1 180 1 busripper-1.sym { T 36400 43600 5 8 0 0 180 6 1 device=none } N 35800 47200 36400 47200 4 { T 35900 47400 5 10 1 1 180 6 1 netname=d2sG } N 35800 47600 36400 47600 4 { T 35900 47800 5 10 1 1 180 6 1 netname=d2sF } N 35800 48000 36400 48000 4 { T 35900 48200 5 10 1 1 180 6 1 netname=d2sE } N 35800 48400 36400 48400 4 { T 35900 48600 5 10 1 1 180 6 1 netname=d2sD } N 35800 48800 36400 48800 4 { T 35900 49000 5 10 1 1 180 6 1 netname=d2sC } N 35800 49200 36400 49200 4 { T 35900 49400 5 10 1 1 180 6 1 netname=d2sB } N 35800 49600 36400 49600 4 { T 35900 49800 5 10 1 1 180 6 1 netname=d2sA } C 36400 49600 1 180 1 busripper-1.sym { T 36400 49200 5 8 0 0 180 6 1 device=none } C 36400 49200 1 180 1 busripper-1.sym { T 36400 48800 5 8 0 0 180 6 1 device=none } C 36400 48800 1 180 1 busripper-1.sym { T 36400 48400 5 8 0 0 180 6 1 device=none } C 36400 48400 1 180 1 busripper-1.sym { T 36400 48000 5 8 0 0 180 6 1 device=none } C 36400 48000 1 180 1 busripper-1.sym { T 36400 47600 5 8 0 0 180 6 1 device=none } C 36400 47600 1 180 1 busripper-1.sym { T 36400 47200 5 8 0 0 180 6 1 device=none } C 36400 47200 1 180 1 busripper-1.sym { T 36400 46800 5 8 0 0 180 6 1 device=none } N 35800 44800 36400 44800 4 { T 35900 45000 5 10 1 1 180 6 1 netname=d3sG } N 35800 45200 36400 45200 4 { T 35900 45400 5 10 1 1 180 6 1 netname=d3sF } N 35800 46800 36400 46800 4 { T 35900 47000 5 10 1 1 180 6 1 netname=d3sB } N 35800 46400 36400 46400 4 { T 35900 46600 5 10 1 1 180 6 1 netname=d3sC } N 35800 46000 36400 46000 4 { T 35900 46200 5 10 1 1 180 6 1 netname=d3sAD } N 35800 45600 36400 45600 4 { T 35900 45800 5 10 1 1 180 6 1 netname=d3sE } C 36400 46800 1 180 1 busripper-1.sym { T 36400 46400 5 8 0 0 180 6 1 device=none } C 36400 46400 1 180 1 busripper-1.sym { T 36400 46000 5 8 0 0 180 6 1 device=none } C 36400 46000 1 180 1 busripper-1.sym { T 36400 45600 5 8 0 0 180 6 1 device=none } C 36400 45600 1 180 1 busripper-1.sym { T 36400 45200 5 8 0 0 180 6 1 device=none } C 36400 45200 1 180 1 busripper-1.sym { T 36400 44800 5 8 0 0 180 6 1 device=none } C 36400 44800 1 180 1 busripper-1.sym { T 36400 44400 5 8 0 0 180 6 1 device=none } N 35800 43200 36400 43200 4 { T 35900 43200 5 10 1 1 0 2 1 netname=grid2 } N 36400 43600 35800 43600 4 { T 35900 43600 5 10 1 1 0 2 1 netname=grid3 } C 36400 43600 1 180 1 busripper-1.sym { T 36400 43200 5 8 0 0 0 2 1 device=none } C 36400 43200 1 180 1 busripper-1.sym { T 36400 42800 5 8 0 0 0 2 1 device=none } N 34400 44000 33800 44000 4 { T 34300 44200 5 10 1 1 180 0 1 netname=dotU } C 33800 44000 1 180 0 busripper-1.sym { T 33800 43600 5 8 0 0 180 0 1 device=none } N 34400 43600 34200 43600 4 N 34200 42000 34400 42000 4 N 34400 42400 34200 42400 4 N 34400 42800 34200 42800 4 N 34400 43200 34200 43200 4 N 35800 42400 36300 42400 4 N 35800 42800 36000 42800 4 N 36000 42800 36000 42400 4 N 36000 42400 36000 42000 4 N 36000 42000 35800 42000 4 N 36300 42400 36300 42500 4 N 16500 53100 17500 53100 4 N 17500 53100 17500 53900 4 N 17700 52500 17700 53700 4 N 17700 52500 16500 52500 4 N 16100 53100 15900 53100 4 N 16100 52500 15900 52500 4 T 14800 44000 9 10 1 0 0 0 1 goal detection illumination C 20000 40000 1 270 0 capacitor-4.sym { T 21100 39800 5 10 0 0 270 0 1 device=POLARIZED_CAPACITOR T 19800 39100 5 10 1 1 0 0 1 refdes=C2 T 20700 39800 5 10 0 0 270 0 1 symversion=0.1 T 20000 40000 5 10 0 1 0 0 1 footprint=RCY100 } C 20600 40000 1 270 0 capacitor-4.sym { T 21700 39800 5 10 0 0 270 0 1 device=POLARIZED_CAPACITOR T 21000 39100 5 10 1 1 0 0 1 refdes=C3 T 21300 39800 5 10 0 0 270 0 1 symversion=0.1 T 20600 40000 5 10 0 1 0 0 1 footprint=RCY100 } N 20200 39100 20200 38900 4 N 20800 39100 20800 38900 4 N 20800 40000 20800 41300 4 B 14500 38200 22300 18200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 B 33700 38200 3100 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 34900 38900 9 10 1 0 0 0 1 air hockey score board T 33800 38900 9 10 1 0 0 0 1 Title: T 33800 38700 9 10 1 0 0 0 1 Drawn by: T 34900 38700 9 10 1 0 0 0 1 Roy Smeding T 33800 38500 9 10 1 0 0 0 1 License: T 34900 38500 9 10 1 0 0 0 1 CC-0 T 33800 38300 9 10 1 0 0 0 1 Page: T 34900 38300 9 10 1 0 0 0 1 1 T 35900 38300 9 10 1 0 0 0 1 1 T 35400 38300 9 10 1 0 0 0 1 of C 15500 52100 1 90 0 beeper-1.sym { T 14600 52400 5 10 0 0 90 0 1 device=BEEPER T 14800 52400 5 10 1 1 90 0 1 refdes=BUZ1 T 14400 52400 5 10 0 0 90 0 1 symversion=0.1 } C 15700 50800 1 0 1 npn-1.sym { T 15100 51300 5 10 0 0 0 6 1 device=NPN_TRANSISTOR T 15100 51300 5 10 1 1 0 6 1 refdes=Q? T 15700 50800 5 10 0 0 0 6 1 footprint=TO92 T 15100 51100 5 10 1 1 0 6 1 device=BC547 } C 17100 51200 1 0 1 resistor-2.sym { T 16700 51550 5 10 0 0 0 6 1 device=RESISTOR T 16900 51500 5 10 1 1 0 6 1 refdes=R? } N 15700 51300 16200 51300 4 N 15200 53500 15200 53100 4 N 15200 52100 15200 51800 4 C 15000 53500 1 0 0 5V-plus-1.sym C 15400 50500 1 180 0 vss-1.sym N 15200 50500 15200 50800 4 N 18700 53500 18000 53500 4 N 18000 51300 18000 53500 4 N 18000 51300 17100 51300 4 @ 1.1 log @save attachment @ text @d572 2 a573 2 C 17100 45700 1 180 0 vss-1.sym N 16500 45900 17300 45900 4 d576 1 a576 1 C 16700 46100 1 90 0 LED.sym d578 1 a578 1 T 14500 46200 5 10 0 0 90 0 1 d580 1 a580 1 T 14700 46200 5 10 0 0 90 0 1 d582 1 a582 1 T 15100 46200 5 10 0 0 90 0 1 d584 1 a584 1 T 16450 46350 5 10 1 1 180 0 1 d586 1 a586 1 T 16700 46100 5 10 0 1 0 0 1 d589 1 a589 1 C 17500 46100 1 90 0 LED.sym d591 1 a591 1 T 15300 46200 5 10 0 0 90 0 1 d593 1 a593 1 T 15500 46200 5 10 0 0 90 0 1 d595 1 a595 1 T 15900 46200 5 10 0 0 90 0 1 d597 1 a597 1 T 17650 46350 5 10 1 1 180 0 1 d599 1 a599 1 T 17500 46100 5 10 0 1 0 0 1 d602 1 a602 1 C 16600 47500 1 90 0 resistor-2.sym d604 1 a604 1 T 16250 47900 5 10 0 0 90 0 1 d606 1 a606 1 T 16300 47700 5 10 1 1 90 0 1 d608 1 a608 1 T 16600 47500 5 10 0 1 0 0 1 d611 1 a611 1 C 17400 47500 1 90 0 resistor-2.sym d613 1 a613 1 T 17050 47900 5 10 0 0 90 0 1 d615 1 a615 1 T 17100 47700 5 10 1 1 90 0 1 d617 1 a617 1 T 17400 47500 5 10 0 1 0 0 1 d620 6 a625 6 N 17300 48900 17300 48400 4 N 16500 48400 16500 48900 4 N 16500 47500 16500 47000 4 N 17300 47500 17300 47000 4 N 17300 46100 17300 45900 4 N 16500 46100 16500 45900 4 d652 4 a655 4 N 17300 48900 16500 48900 4 N 16900 45700 16900 45900 4 C 16700 48900 1 0 0 5V-plus-1.sym C 17900 40100 1 270 0 capacitor-4.sym d657 1 a657 1 T 19000 39900 5 10 0 0 270 0 1 d659 1 a659 1 T 18400 39600 5 10 1 1 0 0 1 d661 1 a661 1 T 18600 39900 5 10 0 0 270 0 1 d663 1 a663 1 T 17900 40100 5 10 0 0 0 0 1 d666 1 a666 1 C 16800 41200 1 0 0 diode-1.sym d668 1 a668 1 T 17200 41800 5 10 0 0 0 0 1 d670 1 a670 1 T 17100 41700 5 10 1 1 0 0 1 d672 1 a672 1 T 17000 41000 5 10 1 1 0 0 1 d674 1 a674 1 T 16800 41200 5 10 0 0 0 0 1 d677 3 a679 3 N 16400 41400 16800 41400 4 N 17700 41400 18500 41400 4 C 16400 40600 1 0 1 connector2-2.sym d681 1 a681 1 T 15700 41900 5 10 1 1 0 0 1 d683 1 a683 1 T 16100 41850 5 10 0 0 0 6 1 d685 1 a685 1 T 16100 42050 5 10 0 0 0 6 1 d687 1 a687 1 T 15700 40400 5 10 1 1 0 0 1 d690 1 a690 1 C 18500 40800 1 0 0 vreg.sym d692 1 a692 1 T 20100 42100 5 10 0 0 0 0 1 d694 1 a694 1 T 19000 41800 5 10 1 1 0 6 1 d696 1 a696 1 T 19500 41800 5 10 1 1 0 0 1 d698 1 a698 1 T 18500 40800 5 10 0 0 0 0 1 d701 1 a701 1 C 19400 39800 1 0 0 vreg.sym d703 1 a703 1 T 21000 41100 5 10 0 0 0 0 1 d705 1 a705 1 T 19900 40800 5 10 1 1 0 6 1 d707 1 a707 1 T 20300 40800 5 10 1 1 0 0 1 d709 1 a709 1 T 19400 39800 5 10 0 0 0 0 1 d712 3 a714 3 C 20400 42300 1 0 0 5V-plus-1.sym C 17900 42300 1 0 0 12V-plus-1.sym C 21000 42300 1 0 0 generic-power.sym d716 1 a716 1 T 21200 42550 5 10 1 1 0 3 1 d719 15 a733 15 N 19300 40800 19300 39000 4 N 16600 39000 21800 39000 4 N 20200 39000 20200 39800 4 N 16600 39000 16600 41000 4 N 16600 41000 16400 41000 4 N 18100 39200 18100 39000 4 C 19500 38800 1 180 0 vss-1.sym N 19300 39000 19300 38800 4 N 18100 41400 18100 40100 4 N 18100 40400 19400 40400 4 N 21000 40400 21200 40400 4 N 21200 40100 21200 42300 4 N 20600 42300 20600 41400 4 N 20100 41400 21800 41400 4 N 18100 41400 18100 42300 4 d1161 1 a1161 1 T 15900 45100 9 10 1 0 0 0 1 d1163 1 a1163 1 C 21000 40100 1 270 0 capacitor-4.sym d1165 1 a1165 1 T 22100 39900 5 10 0 0 270 0 1 d1167 1 a1167 1 T 20800 39200 5 10 1 1 0 0 1 d1169 1 a1169 1 T 21700 39900 5 10 0 0 270 0 1 d1171 1 a1171 1 T 21000 40100 5 10 0 1 0 0 1 d1174 1 a1174 1 C 21600 40100 1 270 0 capacitor-4.sym d1176 1 a1176 1 T 22700 39900 5 10 0 0 270 0 1 d1178 1 a1178 1 T 22000 39200 5 10 1 1 0 0 1 d1180 1 a1180 1 T 22300 39900 5 10 0 0 270 0 1 d1182 1 a1182 1 T 21600 40100 5 10 0 1 0 0 1 d1185 4 a1188 4 N 21200 39200 21200 39000 4 N 21800 39200 21800 39000 4 N 21800 40100 21800 41400 4 B 15400 38200 21400 18200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 d1210 36 @