Zon ZX-81 Programmable Sound Generator expansion for ZX81PLUS35 with working SD-Card

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Project ZON X-81 PSG for ZX81+35
Sound & edge connector expansion board example.png
Programmable sound generator for my ZX81 clone
Status In progress
Contact Mahjongg
Last Update 2016-07-09

The ZON X-81 is a sound generator based on the famous AY-3-8912 PSG.

This is a remake for my ZX-81+35 ZX81 clone. It features stereo sound outputs, and also enables the GPIO's, to which an SD-card slot is connected, which hopefully will enable, with help of some software expansion in ROM, to read SD-cards. Additionally the board serves (can serve) as an interface to a classical edge connector, or to another ZX81+35 expansion board (with pinheader connector).

I started by investigating the original ZON X-81, and soon found out there were two verslons, the original ZON X-81 and the later, "Spectrum compatible" ZON X. For neither a schematic diagram seemed to be available, and there seemed to be some confusion about the I/O ports used. In the end I decided the best course of action seemed to be to use the available information to draw up my own schematic, and ask for input from the community. So I eventually came up with this. File:ZONX sound expansion REV 2,0.pdf

Sound expansion (preliminary)-1.png

The ZON X (and presumably the ZON X-81 also) used just the minimum amount of logic to interface directly to the AY-3-8912 PSG, using just two 74LSxx logic IC,s a 74LS11 and a 74LS02 to access two 8-bit registers of the PSG, the data register and the index register. The data register is used to write data to one of the 18 registers of the chip, the index register is used to choose which one of the 18 registers is used. Some registers control GPIO ports of the chip, depending on the version of the chip there could be zero, one or two of these, the 8912 used has one eight bit port. But on the ZON X you can only write to any of the IO ports,due to the simple decoder logic used. it also used the ancient 7472 TTL chip to create a divide by two counter to divide the 3.25 MHz clock by two to a suitable 1.625MHz clock for the PSG. My guess as a reason for this even then strange choice was that the vendor of the ZON X-81, a company called BI-PAK that was know for selling cheap (3rd choice) transistors and IC's in packages called "BI-Pak" then, had quite some stock left over of 7472's, and decided to use them. in any case their interface logic worked, where many others had taken a look at the convoluted interface logic of the AY-3-8912 chips, and had decided against trying to directly interface to it (the AY-3-89xx series was designed to be interfaced with a CPU that lost the early "CPU wars", the ill faith-ed early PDP11 architecture based 16-bit general instrument CP1610, anyone remembers that one?, it used a completely different bus interface than thwo competing standards, the Motorola, and the Intel bus standard, so interfacing it to a Z80 which the "intel bus", was anything but simple. Most Z80 systems that used the AY-3-8912 therefore controlled it indirectly, often through a "PIO" chip like the intel 8255, as did for example MSX systems, and many others. BI-PAK decided against such an approach, and developed their interface from "fist principles", to be as cheap as possible. Much like the ZX81 itself.

My own version

So, this was my initial starting point, and the revision 1.0 (unfinished) schematic was based on it, except for the audio output circuit, and a more flexible clock generator (at that point I still was not sure which clock frequency the ZON X-81 used, and I wanted an independent clock generator, as the clock of the ZX81+35 could also "randomly" double its clock signal to 6.5MHz (I consider changing that in the definitive version, so the output clock will always be 3.25 MHz even in turbo mode, so I don't need in internal clock generator in my PSG, it will also be more compatible with other expansions).

So this is the first revision schematic:

PSG for ZX81+35 REV 1.0 medium.png


to do; Remove extensive divider, and local xtal oscillator, add simple divider-by-two (1/2 74HC74). √ Done.

add audio output to stereo jack (mix A, B and C outputs).

Add write register logic (Raise BC1 also during valid IORD cycle). √ Done.

add third port header for pinheader as in ZX81+35, as alternative for edge connector. √ Done.

add SD-card interface logic, need pullups on GPIO?

build prototype and test.

try to get to read (FAT32) SD-card using bit-bang driver.

Second version

Revision 1.1, work in progress: File:PSG for ZX81+35 REV 1.1.pdf

PSG for ZX81+35 REV 1.1.png